Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-08-28 | Software | Leonard Kugis | |
Implemented basic functionality. | |||
2020-07-28 | Restructured folders | Leonard Kugis | |
2020-06-21 | General | Leonard Kugis | |
Added real world units for capacitors and resistors. | |||
2020-02-04 | Finished PCB | Leonard Kugis | |
2020-02-04 | Optimized layout | Leonard Kugis | |
2020-02-04 | Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlock | Leonard Kugis | |
2020-02-04 | Layout | Leonard Kugis | |
Optimizations. Changed packaging of some parts. | |||
2020-01-23 | Crystal | Leonard Kugis | |
Replaced crystal with available ABM3B. | |||
2020-01-03 | General | Leonard Kugis | |
Fixed incorrect displays not matching. | |||
2019-11-25 | Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlock | Leonard Kugis | |
2019-11-25 | filled ground | Leonard Kugis | |
2019-11-25 | Freerouting | Leonard Kugis | |
2019-11-25 | Layout | Leonard Kugis | |
Placement corrections. | |||
2019-11-25 | Larger pin headers | Leonard Kugis | |
2019-11-25 | .gitignore | Leonard Kugis | |
Added fabrication outputs to gitignore. | |||
2019-11-25 | Layout | Leonard Kugis | |
Added ground plane. | |||
2019-11-25 | Freerouting | Leonard Kugis | |
2019-11-25 | Schematic, Layout | Leonard Kugis | |
Changed Barrel Jack pinout. Layout components placed. | |||
2019-11-24 | Layout not fitting yet, needs improvement | Leonard Kugis | |
2019-11-24 | Begin associations | Leonard Kugis | |
2019-11-24 | General | Leonard Kugis | |
Added references to all elements. | |||
2019-11-21 | Begin renaming | Leonard Kugis | |
2019-11-20 | UART | Leonard Kugis | |
Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally. | |||
2019-11-19 | General | Leonard Kugis | |
Removed too many test points. | |||
2019-11-13 | . | Leonard Kugis | |
2019-11-13 | Schematic, main | Leonard Kugis | |
Added capacitors for subschematics. | |||
2019-11-13 | Schematic, general | Leonard Kugis | |
Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere. | |||
2019-11-13 | Schematic, UART | Leonard Kugis | |
Added connectors for UART access. | |||
2019-11-13 | Schematic, main | Leonard Kugis | |
Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface. | |||
2019-11-13 | Schematic, main | Leonard Kugis | |
Added capacitor in parallel to reset switch to reduce sensitivity and oscillations. | |||
2019-11-13 | Schematic, main, general | Leonard Kugis | |
Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | |||
2019-11-07 | Schematic, Status | Leonard Kugis | |
Separated logic IO from power with transistors. | |||
2019-11-07 | Schematic, JTAG | Leonard Kugis | |
Added JTAG interface. | |||
2019-11-07 | Removed untracked files | Leonard Kugis | |
2019-11-07 | Added .gitignore | Leonard Kugis | |
2019-11-07 | Schematic, Pinout | Leonard Kugis | |
Moved buttons and status interface to Port D to prepare Port C as JTAG interface. | |||
2019-11-04 | Add README.md | Leonard Kugis | |
2019-11-04 | Add LICENSE | Leonard Kugis | |
2019-11-04 | Layout | Leonard Kugis | |
Minor layout fix. | |||
2019-11-04 | structure, buttons, status | Leonard Kugis | |
Implemented hierarchy. Added button interface. Added status interface. | |||
2019-11-03 | Schematic | Leonard Kugis | |
Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs. | |||
2019-11-01 | Initial commit | Leonard Kugis | |