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path: root/PinLock.sch-bak
AgeCommit message (Collapse)Author
2019-11-13Schematic, mainLeonard Kugis
Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface.
2019-11-13Schematic, mainLeonard Kugis
Added capacitor in parallel to reset switch to reduce sensitivity and oscillations.
2019-11-13Schematic, main, generalLeonard Kugis
Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
2019-11-07Schematic, StatusLeonard Kugis
Separated logic IO from power with transistors.
2019-11-07Schematic, JTAGLeonard Kugis
Added JTAG interface.
2019-11-04LayoutLeonard Kugis
Minor layout fix.
2019-11-04structure, buttons, statusLeonard Kugis
Implemented hierarchy. Added button interface. Added status interface.
2019-11-03SchematicLeonard Kugis
Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs.
2019-11-01Initial commitLeonard Kugis