pinlock.git - Pin protected lock system hardware (KiCAD), software (AVR assembly)

Age	Commit message (Collapse)	Author
2019-11-13	Schematic, general	Leonard Kugis
	Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
2019-11-13	Schematic, main, general	Leonard Kugis
	Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
2019-11-07	Schematic, Status	Leonard Kugis
	Separated logic IO from power with transistors.
2019-11-07	Schematic, Pinout	Leonard Kugis
	Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
2019-11-04	structure, buttons, status	Leonard Kugis
	Implemented hierarchy. Added button interface. Added status interface.