| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-02-04 | Layout | Leonard Kugis | |
| Optimizations. Changed packaging of some parts. | |||
| 2019-11-25 | Larger pin headers | Leonard Kugis | |
| 2019-11-24 | Layout not fitting yet, needs improvement | Leonard Kugis | |
| 2019-11-24 | General | Leonard Kugis | |
| Added references to all elements. | |||
| 2019-11-20 | UART | Leonard Kugis | |
| Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally. | |||
| 2019-11-19 | General | Leonard Kugis | |
| Removed too many test points. | |||
| 2019-11-13 | Schematic, main | Leonard Kugis | |
| Added capacitors for subschematics. | |||
| 2019-11-13 | Schematic, main, general | Leonard Kugis | |
| Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | |||
| 2019-11-07 | Schematic, JTAG | Leonard Kugis | |
| Added JTAG interface. | |||
| 2019-11-07 | Schematic, Pinout | Leonard Kugis | |
| Moved buttons and status interface to Port D to prepare Port C as JTAG interface. | |||
| 2019-11-04 | structure, buttons, status | Leonard Kugis | |
| Implemented hierarchy. Added button interface. Added status interface. | |||
 |
index : pinlock.git | |
| Pin protected lock system hardware (KiCAD), software (AVR assembly) |
| summaryrefslogtreecommitdiff |
path: root/status.sch-bak