diff options
author | Leonard Kugis <leonard@kug.is> | 2019-11-13 11:31:21 +0100 |
---|---|---|
committer | Leonard Kugis <leonard@kug.is> | 2019-11-13 11:31:21 +0100 |
commit | d2eb2eb1aa37e6b7e83a3253d553459a9a81a5a6 (patch) | |
tree | 31aed8d84d89bbdfed6424bb8d89abf14ca09f42 /PinLock-cache.lib | |
parent | c62ca36449ef69334c74d4b66def3a0cb3163477 (diff) |
Schematic, main, general
Added pull resistors to all ports.
Added capacitors for all components to prevent high switching currents.
Reordered status LEDs and transistors.
Diffstat (limited to 'PinLock-cache.lib')
-rw-r--r-- | PinLock-cache.lib | 100 |
1 files changed, 74 insertions, 26 deletions
diff --git a/PinLock-cache.lib b/PinLock-cache.lib index 2badeec..0d6a264 100644 --- a/PinLock-cache.lib +++ b/PinLock-cache.lib @@ -1,38 +1,65 @@ EESchema-LIBRARY Version 2.4
#encoding utf-8
#
-# 74xx_74LS323
+# 74xx_74HC164
#
-DEF 74xx_74LS323 U 0 40 Y Y 1 L N
-F0 "U" -300 650 50 H V C CNN
-F1 "74xx_74LS323" -300 -750 50 H V C CNN
+DEF 74xx_74HC164 U 0 20 Y Y 1 F N
+F0 "U" 75 -550 50 H V L CNN
+F1 "74xx_74HC164" 75 -650 50 H V L CNN
+F2 "" 900 -300 50 H I C CNN
+F3 "" 900 -300 50 H I C CNN
+ALIAS 74HCT164
+$FPLIST
+ SOIC*3.9x8.7*P1.27mm*
+ ?SSOP*P0.65mm*
+$ENDFPLIST
+DRAW
+S 300 400 -300 -500 0 1 10 f
+X DSA 1 -400 0 100 R 50 50 1 1 I
+X Q4 10 400 -100 100 L 50 50 1 1 O
+X Q5 11 400 -200 100 L 50 50 1 1 O
+X Q6 12 400 -300 100 L 50 50 1 1 O
+X Q7 13 400 -400 100 L 50 50 1 1 O
+X VCC 14 0 500 100 D 50 50 1 1 W
+X DSB 2 -400 -100 100 R 50 50 1 1 I
+X Q0 3 400 300 100 L 50 50 1 1 O
+X Q1 4 400 200 100 L 50 50 1 1 O
+X Q2 5 400 100 100 L 50 50 1 1 O
+X Q3 6 400 0 100 L 50 50 1 1 O
+X GND 7 0 -600 100 U 50 50 1 1 W
+X CP 8 -400 -300 100 R 50 50 1 1 I
+X ~MR 9 -400 200 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS166
+#
+DEF 74xx_74LS166 U 0 40 Y Y 1 L N
+F0 "U" -300 850 50 H V C CNN
+F1 "74xx_74LS166" -300 -850 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
- DIP?20*
+ DIP?16*
$ENDFPLIST
DRAW
-S -300 600 300 -700 1 1 10 f
-X S0 1 -500 200 200 R 50 50 1 0 I
-X GND 10 0 -900 200 U 50 50 1 0 W
-X DS0 11 -500 500 200 R 50 50 1 0 I
-X Cp 12 -500 -300 200 R 50 50 1 0 I C
-X IO1 13 500 200 200 L 50 50 1 0 T
-X IO3 14 500 0 200 L 50 50 1 0 T
-X IO5 15 500 -200 200 L 50 50 1 0 T
-X IO7 16 500 -400 200 L 50 50 1 0 T
-X Q7 17 500 500 200 L 50 50 1 0 O
-X DS7 18 -500 400 200 R 50 50 1 0 I
-X S1 19 -500 100 200 R 50 50 1 0 I
-X OE1 2 -500 -500 200 R 50 50 1 0 I I
-X VCC 20 0 800 200 D 50 50 1 0 W
-X OE2 3 -500 -600 200 R 50 50 1 0 I I
-X IO6 4 500 -300 200 L 50 50 1 0 T
-X IO4 5 500 -100 200 L 50 50 1 0 T
-X IO2 6 500 100 200 L 50 50 1 0 T
-X IO0 7 500 300 200 L 50 50 1 0 T
-X Q0 8 500 400 200 L 50 50 1 0 O
-X SR 9 -500 -100 200 R 50 50 1 0 I I
+S -300 800 300 -800 1 1 10 f
+X Ds 1 -500 700 200 R 50 50 1 0 I
+X E 10 -500 200 200 R 50 50 1 0 I
+X F 11 -500 100 200 R 50 50 1 0 I
+X G 12 -500 0 200 R 50 50 1 0 I
+X Qh 13 500 700 200 L 50 50 1 0 O
+X H 14 -500 -100 200 R 50 50 1 0 I
+X PE 15 -500 -300 200 R 50 50 1 0 I I
+X VCC 16 0 1000 200 D 50 50 1 0 W
+X A 2 -500 600 200 R 50 50 1 0 I
+X B 3 -500 500 200 R 50 50 1 0 I
+X C 4 -500 400 200 R 50 50 1 0 I
+X D 5 -500 300 200 R 50 50 1 0 I
+X CE 6 -500 -500 200 R 50 50 1 0 I I
+X Clk 7 -500 -400 200 R 50 50 1 0 I
+X GND 8 0 -1000 200 U 50 50 1 0 W
+X Clr 9 -500 -700 200 R 50 50 1 0 I I
ENDDRAW
ENDDEF
#
@@ -219,6 +246,27 @@ X ~ 2 0 -150 110 U 50 50 1 1 P ENDDRAW
ENDDEF
#
+# Device_Crystal
+#
+DEF Device_Crystal Y 0 40 N N 1 F N
+F0 "Y" 0 150 50 H V C CNN
+F1 "Device_Crystal" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Crystal*
+$ENDFPLIST
+DRAW
+S -45 100 45 -100 0 1 12 N
+P 2 0 1 0 -100 0 -75 0 N
+P 2 0 1 20 -75 -50 -75 50 N
+P 2 0 1 20 75 -50 75 50 N
+P 2 0 1 0 100 0 75 0 N
+X 1 1 -150 0 50 R 50 50 1 1 P
+X 2 2 150 0 50 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
# Device_LED
#
DEF Device_LED D 0 40 N N 1 F N
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