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.include "m16def.inc"
.def tmp0 = r16
.def par0 = r17
.def par1 = r18
.def tmp1 = r19
.def tmp2 = r20
.def ret0 = r21
.def ret1 = r22
.def par2 = r23
.def par3 = r24
.def par4 = r25
.def ret2 = r26
.def heart = r27
init:
ldi tmp0, HIGH(RAMEND)
out SPH, tmp0
ldi tmp0, LOW(RAMEND)
out SPL, tmp0
ldi tmp0, 0b11111111
out DDRA, tmp0
ldi tmp0, 0b11111111
out DDRB, tmp0
ldi tmp0, 0b11101110
out DDRD, tmp0
cbi PORTC, 0
sbi PORTC, 6
sbi DDRC, 0
sbi DDRC, 1
sbi DDRC, 6
ldi tmp0, 0b00000000
out PORTD, tmp0
ldi heart, 0
ldi par0, 0
ldi par1, 0
rcall display
ldi par0, 1
ldi par1, 1
rcall display
ldi par0, 2
ldi par1, 2
rcall display
ldi par0, 3
ldi par1, 3
rcall display
ldi tmp0, 0
ldi tmp1, 0
push tmp0
push tmp1
rjmp main
debug_heart:
push par0
push par1
push par2
inc heart
ldi par0, 3
mov par1, heart
rcall display
mov par0, heart
rcall status
ldi par0, 0xFF
ldi par1, 1
ldi par2, 1
rcall wait
pop par2
pop par1
pop par0
ret
main:
; get current button states
rcall input
; detect raising edge on one of the buttons
pop tmp0
pop tmp1
push ret1
push ret0
eor tmp0, ret0
eor tmp1, ret1
and tmp0, ret0
and tmp1, ret1
; check if no button has pressed
ldi tmp2, 0
or tmp2, tmp0
or tmp2, tmp1
breq main
; button pressed, process
mov par0, tmp0
mov par1, tmp1
rcall translate
ldi par0, 0
mov par1, ret0
rcall display
;mov par0, ret0
;rcall handle
rjmp main
wait:
push tmp0
push tmp1
mov tmp0, par0
mov tmp1, par1
wait_loop:
dec tmp0
nop
brne wait_loop
mov tmp0, par0
dec tmp1
brne wait_loop
mov tmp0, par0
mov tmp1, par1
dec tmp2
brne wait_loop
pop tmp1
pop tmp0
ret
; Output bits to shift register.
; Parameters:
; par0 = Bits
; par1:par2 = Call address to set 0
; par3:par4 = Call address to set 1
; Returns:
; None
shift_out:
push par0
push tmp0
ldi tmp0, 8
shift_out_loop:
sbrs par0, 7
rjmp shift_out_low
rjmp shift_out_high
shift_out_low:
mov r31, par1
mov r30, par2
icall
rjmp shift_out_end
shift_out_high:
mov r31, par3
mov r30, par4
icall
rjmp shift_out_end
shift_out_end:
lsl par0
dec tmp0
brne shift_out_loop
pop tmp0
pop par0
ret
; Input bits from shift register.
; Parameters:
; par0:par1 = Call address for one clock cycle
; par2:par3 = Call address to read serial shift in bit
; Returns:
; ret0 = Read bits
shift_in:
push tmp0
ldi tmp0, 8
ldi ret0, 0
shift_in_loop:
lsl ret0
mov r31, par2
mov r30, par3
icall
or ret0, ret2
mov r31, par0
mov r30, par1
icall
dec tmp0
brne shift_in_loop
pop tmp0
ret
; Output the status
; Parameters:
; par0 = Status bits
; Returns:
; None
status:
push par1
push par2
push par3
push par4
ldi par1, HIGH(status_low)
ldi par2, LOW(status_low)
ldi par3, HIGH(status_high)
ldi par4, LOW(status_high)
rcall shift_out
pop par1
pop par2
pop par3
pop par4
ret
status_low:
push tmp2
in tmp2, PORTD
cbr tmp2, 6
rjmp status_clk
status_high:
push tmp2
in tmp2, PORTD
sbr tmp2, 6
rjmp status_clk
status_clk:
cbr tmp2, 7
out PORTD, tmp2
sbr tmp2, 7
out PORTD, tmp2
pop tmp2
ret
; Display the digit on a given display.
; Parameters:
; par0 = Display number
; par1 = Digit
; Returns:
; None
display:
push tmp0
push tmp1
mov tmp0, par1
andi tmp0, 0x0F
cpi par0, 0
breq display_0
cpi par0, 1
breq display_1
cpi par0, 2
breq display_2
cpi par0, 3
breq display_3
rjmp display_end
display_0:
in tmp1, PORTA
andi tmp1, 0xF0
or tmp1, tmp0
out PORTA, tmp1
rjmp display_end
display_1:
in tmp1, PORTB
andi tmp1, 0xF0
or tmp1, tmp0
out PORTB, tmp1
rjmp display_end
display_2:
in tmp1, PORTA
andi tmp1, 0x0F
lsl tmp0
lsl tmp0
lsl tmp0
lsl tmp0
or tmp1, tmp0
out PORTA, tmp1
rjmp display_end
display_3:
in tmp1, PORTB
andi tmp1, 0x0F
lsl tmp0
lsl tmp0
lsl tmp0
lsl tmp0
or tmp1, tmp0
out PORTB, tmp1
rjmp display_end
display_end:
pop tmp1
pop tmp0
ret
; Read the input buttons.
; Parameters:
; None
; Returns:
; ret0 = 0852*741
; ret1 = DCBA#963
input:
; Write selection rows
ldi par0, 1
input_loop:
ldi par1, HIGH(input_write_low)
ldi par2, LOW(input_write_low)
ldi par3, HIGH(input_write_high)
ldi par4, LOW(input_write_high)
rcall shift_out
rjmp input_read
input_write_low:
cbi PORTD, 3
rcall input_write_clk
ret
input_write_high:
sbi PORTD, 3
rcall input_write_clk
ret
input_read:
push tmp0
; clear
cbi PORTC, 6
push par0
push par1
push par2
ldi par0, 1
ldi par1, 1
ldi par2, 1
rcall wait
sbi PORTC, 6
ldi par0, 1
ldi par1, 1
ldi par2, 1
rcall wait
pop par2
pop par1
pop par0
; load
sbi PORTD, 2
cbi PORTD, 2
push par0
push par1
push par2
ldi par0, 1
ldi par1, 1
ldi par2, 1
rcall wait
pop par2
pop par1
pop par0
rcall input_read_clk
sbi PORTD, 2
; shift in
push par0
ldi par0, HIGH(input_read_clk)
ldi par1, LOW(input_read_clk)
ldi par2, HIGH(input_read_bit)
ldi par3, LOW(input_read_bit)
push ret0
rcall shift_in
mov tmp0, ret0
pop ret0
pop par0
;lsr tmp0
;lsr tmp0
;lsr tmp0
;lsr tmp0
; par0 = row
; tmp0 = col
sbrc par0, 0
rjmp input_read_row_0
sbrc par0, 1
rjmp input_read_row_1
sbrc par0, 2
rjmp input_read_row_2
sbrc par0, 3
rjmp input_read_row_3
input_write_clk:
cbi PORTC, 1
push par0
push par1
push par2
ldi par0, 1
ldi par1, 1
ldi par2, 1
;rcall wait
sbi PORTC, 1
ldi par0, 1
ldi par1, 1
ldi par2, 1
;rcall wait
pop par2
pop par1
pop par0
ret
input_read_clk:
cbi PORTD, 5
push par0
push par1
push par2
ldi par0, 1
ldi par1, 1
ldi par2, 1
;rcall wait
sbi PORTD, 5
ldi par0, 1
ldi par1, 1
ldi par2, 1
;rcall wait
pop par2
pop par1
pop par0
ret
input_read_bit:
ldi ret2, 0
sbic PIND, 4
ldi ret2, 1
ret
input_read_row_0:
andi ret0, 0xF0
or ret0, tmp0
rjmp input_end
input_read_row_1:
andi ret0, 0x0F
lsl tmp0
lsl tmp0
lsl tmp0
lsl tmp0
or ret0, tmp0
rjmp input_end
input_read_row_2:
andi ret1, 0xF0
or ret1, tmp0
rjmp input_end
input_read_row_3:
andi ret1, 0x0F
lsl tmp0
lsl tmp0
lsl tmp0
lsl tmp0
or ret1, tmp0
rjmp input_end
input_end:
pop tmp0
lsl par0
andi par0, 0x0F
cpi par0, 0
brne input_loop_j
ret
input_loop_j:
rjmp input_loop
; Translate input bits to keycode.
; Parameters:
; par0 = Input bits 7..0
; par1 = Input bits 15..8
; Returns:
; ret0 = Translated keycode
translate:
push par0
push par1
push tmp0
ldi tmp0, 16
translate_loop:
sbrs par0, 0
rjmp translate_low
rjmp translate_high
translate_low:
rjmp translate_end
translate_high:
push tmp0
push tmp1
ldi ZL, LOW(translate_map << 1)
ldi ZH, HIGH(translate_map << 1)
dec tmp0
ldi tmp1, 0
add ZL, tmp0
adc ZH, tmp1
lpm ret0, Z
pop tmp1
pop tmp0
rjmp translate_end
translate_end:
lsr par0
lsr par1
brcc pc+2
ori par0, 0x80
dec tmp0
brne translate_loop
pop tmp0
pop par1
pop par0
ret
translate_map:
.db 0x0D, \
0x0C, \
0x0B, \
0x0A, \
0x0F, \
9, \
6, \
3, \
0, \
8, \
5, \
2, \
0x0E, \
7, \
4, \
1
; ret0 = 0852*741
; ret1 = DCBA#963
; Handles the given key input.
; Parameters:
; par0 = keycode
; Returns:
;
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