5 files changed, 385 insertions, 0 deletions

diff --git a/PinLock-cache.lib b/PinLock-cache.lib
new file mode 100644
index 0000000..44c94e9
--- /dev/null
+++ b/PinLock-cache.lib
@@ -0,0 +1,184 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# 74xx_74LS48
+#
+DEF 74xx_74LS48 U 0 40 Y Y 1 L N
+F0 "U" -300 450 50 H V C CNN
+F1 "74xx_74LS48" -300 -550 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ DIP?16*
+$ENDFPLIST
+DRAW
+S -300 400 300 -500 1 1 10 f
+X B 1 -500 200 200 R 50 50 1 0 I
+X d 10 500 0 200 L 50 50 1 0 C
+X c 11 500 100 200 L 50 50 1 0 C
+X b 12 500 200 200 L 50 50 1 0 C
+X a 13 500 300 200 L 50 50 1 0 C
+X g 14 500 -300 200 L 50 50 1 0 C
+X f 15 500 -200 200 L 50 50 1 0 C
+X VCC 16 0 600 200 D 50 50 1 0 W
+X C 2 -500 100 200 R 50 50 1 0 I
+X LT 3 -500 -200 200 R 50 50 1 0 I I
+X BI 4 -500 -300 200 R 50 50 1 0 I I
+X RBI 5 -500 -400 200 R 50 50 1 0 I I
+X D 6 -500 0 200 R 50 50 1 0 I
+X A 7 -500 300 200 R 50 50 1 0 I
+X GND 8 0 -700 200 U 50 50 1 0 W
+X e 9 500 -100 200 L 50 50 1 0 C
+ENDDRAW
+ENDDEF
+#
+# Connector_Barrel_Jack_MountingPin
+#
+DEF Connector_Barrel_Jack_MountingPin J 0 20 Y N 1 F N
+F0 "J" 0 210 50 H V C CNN
+F1 "Connector_Barrel_Jack_MountingPin" 50 -250 50 H V L CNN
+F2 "" 50 -40 50 H I C CNN
+F3 "" 50 -40 50 H I C CNN
+$FPLIST
+ BarrelJack*
+$ENDFPLIST
+DRAW
+A -130 100 25 901 -901 0 1 10 F -130 125 -130 75
+A -130 100 25 901 -901 0 1 10 N -130 125 -130 75
+T 0 0 -165 15 0 1 1 Mounting Normal 0 C C
+S -200 150 200 -150 0 1 10 f
+S 145 125 -130 75 0 1 10 F
+P 2 0 1 10 200 100 150 100 N
+P 6 0 1 10 -150 -100 -100 -100 -50 -50 0 -100 100 -100 200 -100 N
+P 2 1 1 6 -40 -180 40 -180 N
+X ~ 1 300 100 100 L 50 50 1 1 P
+X ~ 2 300 -100 100 L 50 50 1 1 P
+X MountPin MP 0 -300 120 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Connector_USB_B_Micro
+#
+DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
+F0 "J" -200 450 50 H V L CNN
+F1 "Connector_USB_B_Micro" -200 350 50 H V L CNN
+F2 "" 150 -50 50 H I C CNN
+F3 "" 150 -50 50 H I C CNN
+ALIAS USB_B_Mini
+$FPLIST
+ USB*
+$ENDFPLIST
+DRAW
+C -150 85 25 0 1 10 F
+C -25 135 15 0 1 10 F
+S -200 -300 200 300 0 1 10 f
+S -5 -300 5 -270 0 1 0 N
+S 10 50 -20 20 0 1 10 F
+S 200 -205 170 -195 0 1 0 N
+S 200 -105 170 -95 0 1 0 N
+S 200 -5 170 5 0 1 0 N
+S 200 195 170 205 0 1 0 N
+P 2 0 1 10 -75 85 25 85 N
+P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
+P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
+P 4 0 1 10 25 110 25 60 75 85 25 110 F
+P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
+P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
+X VBUS 1 300 200 100 L 50 50 1 1 w
+X D- 2 300 -100 100 L 50 50 1 1 P
+X D+ 3 300 0 100 L 50 50 1 1 P
+X ID 4 300 -200 100 L 50 50 1 1 P
+X GND 5 0 -400 100 U 50 50 1 1 w
+X Shield 6 -100 -400 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# MCU_Microchip_ATmega_ATmega16A-PU
+#
+DEF MCU_Microchip_ATmega_ATmega16A-PU U 0 20 Y Y 1 F N
+F0 "U" -500 1950 50 H V L BNN
+F1 "MCU_Microchip_ATmega_ATmega16A-PU" 100 -1950 50 H V L TNN
+F2 "Package_DIP:DIP-40_W15.24mm" 0 0 50 H I C CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS ATmega16-16PU ATmega16A-PU ATmega32L-8PU ATmega32-16PU ATmega32A-PU
+$FPLIST
+ DIP*W15.24mm*
+$ENDFPLIST
+DRAW
+S -500 -1900 500 1900 0 1 10 f
+X PB0 1 600 800 100 L 50 50 1 1 T
+X VCC 10 0 2000 100 D 50 50 1 1 W
+X GND 11 0 -2000 100 U 50 50 1 1 W
+X XTAL2 12 -600 1300 100 R 50 50 1 1 O
+X XTAL1 13 -600 1500 100 R 50 50 1 1 I
+X PD0 14 600 -1000 100 L 50 50 1 1 T
+X PD1 15 600 -1100 100 L 50 50 1 1 T
+X PD2 16 600 -1200 100 L 50 50 1 1 T
+X PD3 17 600 -1300 100 L 50 50 1 1 T
+X PD4 18 600 -1400 100 L 50 50 1 1 T
+X PD5 19 600 -1500 100 L 50 50 1 1 T
+X PB1 2 600 700 100 L 50 50 1 1 T
+X PD6 20 600 -1600 100 L 50 50 1 1 T
+X PD7 21 600 -1700 100 L 50 50 1 1 T
+X PC0 22 600 -100 100 L 50 50 1 1 T
+X PC1 23 600 -200 100 L 50 50 1 1 T
+X PC2 24 600 -300 100 L 50 50 1 1 T
+X PC3 25 600 -400 100 L 50 50 1 1 T
+X PC4 26 600 -500 100 L 50 50 1 1 T
+X PC5 27 600 -600 100 L 50 50 1 1 T
+X PC6 28 600 -700 100 L 50 50 1 1 T
+X PC7 29 600 -800 100 L 50 50 1 1 T
+X PB2 3 600 600 100 L 50 50 1 1 T
+X AVCC 30 100 2000 100 D 50 50 1 1 W
+X GND 31 0 -2000 100 U 50 50 1 1 P N
+X AREF 32 -600 1100 100 R 50 50 1 1 P
+X PA7 33 600 1000 100 L 50 50 1 1 T
+X PA6 34 600 1100 100 L 50 50 1 1 T
+X PA5 35 600 1200 100 L 50 50 1 1 T
+X PA4 36 600 1300 100 L 50 50 1 1 T
+X PA3 37 600 1400 100 L 50 50 1 1 T
+X PA2 38 600 1500 100 L 50 50 1 1 T
+X PA1 39 600 1600 100 L 50 50 1 1 T
+X PB3 4 600 500 100 L 50 50 1 1 T
+X PA0 40 600 1700 100 L 50 50 1 1 T
+X PB4 5 600 400 100 L 50 50 1 1 T
+X PB5 6 600 300 100 L 50 50 1 1 T
+X PB6 7 600 200 100 L 50 50 1 1 T
+X PB7 8 600 100 100 L 50 50 1 1 T
+X ~RESET 9 -600 1700 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Regulator_Linear_AMS1117-5.0
+#
+DEF Regulator_Linear_AMS1117-5.0 U 0 10 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "Regulator_Linear_AMS1117-5.0" 0 125 50 H V L CNN
+F2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN
+F3 "" 100 -250 50 H I C CNN
+ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 AMS1117-1.5 AMS1117-1.8 AMS1117-2.5 AMS1117-2.85 AMS1117-3.3 AMS1117-5.0
+$FPLIST
+ SOT?223*TabPin2*
+$ENDFPLIST
+DRAW
+S -200 -200 200 75 0 1 10 f
+X GND 1 0 -300 100 U 50 50 1 1 W
+X VO 2 300 0 100 L 50 50 1 1 w
+X VI 3 -300 0 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/PinLock.kicad_pcb b/PinLock.kicad_pcb
new file mode 100644
index 0000000..02c8ecb
--- /dev/null
+++ b/PinLock.kicad_pcb
@@ -0,0 +1 @@
+(kicad_pcb (version 4) (host kicad "dummy file") )
diff --git a/PinLock.pro b/PinLock.pro
new file mode 100644
index 0000000..152769c
--- /dev/null
+++ b/PinLock.pro
@@ -0,0 +1,33 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
diff --git a/PinLock.sch b/PinLock.sch
new file mode 100644
index 0000000..675ba11
--- /dev/null
+++ b/PinLock.sch
@@ -0,0 +1,151 @@
+EESchema Schematic File Version 4
+LIBS:PinLock-cache
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "Pin Lock"
+Date "2019-10-29"
+Rev "1.0"
+Comp ""
+Comment1 "Mikrocontroller Seminar"
+Comment2 "WiSe 2019/2020"
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L 74xx:74LS48 U?
+U 1 1 5DB8ABBB
+P 7650 1800
+F 0 "U?" H 7650 2581 50  0000 C CNN
+F 1 "74LS48" H 7650 2490 50  0000 C CNN
+F 2 "" H 7650 1800 50  0001 C CNN
+F 3 "http://www.ti.com/lit/gpn/sn74LS48" H 7650 1800 50  0001 C CNN
+	1    7650 1800
+	1    0    0    -1  
+$EndComp
+$Comp
+L 74xx:74LS48 U?
+U 1 1 5DB8F280
+P 9150 1800
+F 0 "U?" H 9150 2581 50  0000 C CNN
+F 1 "74LS48" H 9150 2490 50  0000 C CNN
+F 2 "" H 9150 1800 50  0001 C CNN
+F 3 "http://www.ti.com/lit/gpn/sn74LS48" H 9150 1800 50  0001 C CNN
+	1    9150 1800
+	1    0    0    -1  
+$EndComp
+$Comp
+L 74xx:74LS48 U?
+U 1 1 5DB99928
+P 7650 3650
+F 0 "U?" H 7650 4431 50  0000 C CNN
+F 1 "74LS48" H 7650 4340 50  0000 C CNN
+F 2 "" H 7650 3650 50  0001 C CNN
+F 3 "http://www.ti.com/lit/gpn/sn74LS48" H 7650 3650 50  0001 C CNN
+	1    7650 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L 74xx:74LS48 U?
+U 1 1 5DB9A0A0
+P 9450 3650
+F 0 "U?" H 9450 4431 50  0000 C CNN
+F 1 "74LS48" H 9450 4340 50  0000 C CNN
+F 2 "" H 9450 3650 50  0001 C CNN
+F 3 "http://www.ti.com/lit/gpn/sn74LS48" H 9450 3650 50  0001 C CNN
+	1    9450 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L MCU_Microchip_ATmega:ATmega16A-PU U?
+U 1 1 5DB85A9E
+P 5300 3300
+F 0 "U?" H 5300 1211 50  0000 C CNN
+F 1 "ATmega16A-PU" H 5300 1120 50  0000 C CNN
+F 2 "Package_DIP:DIP-40_W15.24mm" H 5300 3300 50  0001 C CIN
+F 3 "http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8154-8-bit-AVR-ATmega16A_Datasheet.pdf" H 5300 3300 50  0001 C CNN
+	1    5300 3300
+	1    0    0    -1  
+$EndComp
+$Comp
+L Connector:Barrel_Jack_MountingPin J?
+U 1 1 5DBB60C9
+P 2300 1050
+F 0 "J?" H 2357 1367 50  0000 C CNN
+F 1 "Barrel_Jack_MountingPin" H 2357 1276 50  0000 C CNN
+F 2 "" H 2350 1010 50  0001 C CNN
+F 3 "~" H 2350 1010 50  0001 C CNN
+	1    2300 1050
+	1    0    0    -1  
+$EndComp
+$Comp
+L Regulator_Linear:AMS1117-5.0 U?
+U 1 1 5DBB71E9
+P 3500 950
+F 0 "U?" H 3500 1192 50  0000 C CNN
+F 1 "AMS1117-5.0" H 3500 1101 50  0000 C CNN
+F 2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" H 3500 1150 50  0001 C CNN
+F 3 "http://www.advanced-monolithic.com/pdf/ds1117.pdf" H 3600 700 50  0001 C CNN
+	1    3500 950 
+	1    0    0    -1  
+$EndComp
+$Comp
+L Connector:USB_B_Micro J?
+U 1 1 5DBB7B46
+P 2250 2000
+F 0 "J?" H 2307 2467 50  0000 C CNN
+F 1 "USB_B_Micro" H 2307 2376 50  0000 C CNN
+F 2 "" H 2400 1950 50  0001 C CNN
+F 3 "~" H 2400 1950 50  0001 C CNN
+	1    2250 2000
+	1    0    0    -1  
+$EndComp
+NoConn ~ 2550 2000
+NoConn ~ 2300 1350
+NoConn ~ 2550 2100
+NoConn ~ 2550 2200
+NoConn ~ 2150 2400
+Wire Wire Line
+	2600 1150 2900 1150
+Wire Wire Line
+	2900 1150 2900 950 
+Wire Wire Line
+	2600 950  2750 950 
+Wire Wire Line
+	2750 950  2750 2400
+Wire Wire Line
+	2250 2400 2750 2400
+Connection ~ 2750 2400
+Wire Wire Line
+	2750 2400 2750 5950
+$Comp
+L power:GND #PWR?
+U 1 1 5DBD43C2
+P 2750 5950
+F 0 "#PWR?" H 2750 5700 50  0001 C CNN
+F 1 "GND" H 2755 5777 50  0000 C CNN
+F 2 "" H 2750 5950 50  0001 C CNN
+F 3 "" H 2750 5950 50  0001 C CNN
+	1    2750 5950
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2900 950  3200 950 
+Wire Wire Line
+	3500 1250 3500 2400
+Wire Wire Line
+	3500 2400 2750 2400
+Wire Wire Line
+	3800 950  4000 950 
+Wire Wire Line
+	5300 950  5300 1300
+Wire Wire Line
+	2550 1800 4000 1800
+Wire Wire Line
+	4000 1800 4000 950 
+Connection ~ 4000 950 
+Wire Wire Line
+	4000 950  5300 950 
+$EndSCHEMATC
diff --git a/PinLock.sch-bak b/PinLock.sch-bak
new file mode 100644
index 0000000..3e98ded
--- /dev/null
+++ b/PinLock.sch-bak
@@ -0,0 +1,16 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "Pin Lock"
+Date "2019-10-29"
+Rev "1.0"
+Comp ""
+Comment1 "Mikrocontroller Seminar"
+Comment2 "WiSe 2019/2020"
+Comment3 ""
+Comment4 ""
+$EndDescr
+$EndSCHEMATC